commit 5baff2808906de6d7d3ed0b3b370e5e15d3b00c7 from: Onana Onana Xavier Manuel date: Mon Sep 21 07:06:23 2026 UTC xhci dev - added a capability register parser that sets value to be easily read. commit - 926b74e13774d63362001d959107557f48d3b217 commit + 5baff2808906de6d7d3ed0b3b370e5e15d3b00c7 blob - b05e33ba0744374aa3a5113154b4b8ca18435939 blob + 6238c527e6e771011eec122e97fe03490b8d52d7 --- alpha/main.c +++ alpha/main.c @@ -62,7 +62,7 @@ task_new(void *entry) sysc.type = SYSC_NEW_THREAD; sysc.new_thread.entry = entry; - sysc.new_thread.memsize = PAGE_SIZE; + sysc.new_thread.memsize = PAGE_SIZE * 4; sysc.new_thread.nseats = 1; for (int i = 0; i < MAX_TASKS; i++) { blob - b89597ddddc296a72309b7725c2e1e4c0e65861d blob + 9f7cca2cfb0beb306bec088eec4730a5351ef79c --- servers/xhci/main.c +++ servers/xhci/main.c @@ -2,32 +2,141 @@ // it can handle. The slot maximum can be changed at compile // time by the end user. +// There is 1 command ring per xhci controller + #include "types.h" #include "libc.h" #include "xhci.h" +struct xhci_ctl { + u8 CAPLENGTH; + u16 HCIVERSION; + struct _HCSPARAMS1 { + u8 MaxSlots; + u16 MaxIntrs; + u8 MaxPorts; + } HCSPARAMS1; + struct _HCSPARAMS2 { + u8 IST; + u8 ERST_Max; + u8 Max_Scratchpad_Bufs_Hi; + u8 SPR; + u8 Max_Scratchpad_Bufs_Lo; + } HCSPARAMS2; + struct _HCSPARAMS3 { + u8 U1_Device_Exit_Latency; + u16 U2_Device_Exit_Latency; + } HCSPARAMS3; + struct _HCCPARAMS1 { + u8 AC64; + u8 BNC; + u8 CSZ; + u8 PPC; + u8 PIND; + u8 LHRC; + u8 LTC; + u8 NSS; + u8 PAE; + u8 SPC; + u8 SEC; + u8 CFC; + u8 MaxPSASize; + u16 xECP; + } HCCPARAMS1; + u32 DBOFF; + u32 RTSOFF; + struct _HCCPARAMS2 { + u8 U3C; + u8 CMC; + u8 FSC; + u8 CTC; + u8 LEC; + u8 CIC; + u8 ETC; + u8 ETC_TSC; + u8 GSC; + u8 VTC; + } HCCPARAMS2; +}; + +void setup_ctl(struct xhci_ctl *, u64); + void xhci_main(struct contract *con) { struct shared_buffer *sbuf; + struct xhci_ctl ctl; struct xhcip *xhcip; u64 xhcibar; output("xhci: running\n"); output("xhci: listening\n"); listen(con->sharedBlocks[0]); - yield(); - sbuf = (struct shared_buffer *)con->sharedBlocks[0]; + + // Waiting for a write + while (sbuf->busy == 0) + yield(); + xhcip = (struct xhcip *)sbuf->data; output("xhci: bar address is "); outputh(xhcip->address); output("\n"); + setup_ctl(&ctl, xhcip->address); - volatile u32 *xhci_base = (volatile u32 *)xhcip->address; - u32 cap_reg = xhci_base[0]; - u8 cap_len = cap_reg & 0xff; - u16 hci_version = (cap_reg >> 16) & 0xffff; - output("xhci version: "); outputh(hci_version); output("\n"); - for (;;); } + +void +setup_ctl(struct xhci_ctl *ctl, u64 bar) +{ + u32 *base = (u32 *)bar; + + ctl->CAPLENGTH = base[0] & 0xff; + ctl->HCIVERSION = base[0] >> 16; + + ctl->HCSPARAMS1.MaxSlots = base[1] & 0xff; + ctl->HCSPARAMS1.MaxIntrs = (base[1] >> 8) & 0x7ff; + ctl->HCSPARAMS1.MaxPorts = (base[1] >> 24); + + ctl->HCSPARAMS2.IST = (base[2] & 0xf); + ctl->HCSPARAMS2.ERST_Max = (base[2] >> 0x4) & 0xf; + ctl->HCSPARAMS2.Max_Scratchpad_Bufs_Hi = (base[2] >> 27) & 0x1f; + ctl->HCSPARAMS2.SPR = (base[2] >> 26) & 0x1; + ctl->HCSPARAMS2.Max_Scratchpad_Bufs_Lo = (base[2] >> 21) & 0x1f; + + ctl->HCSPARAMS3.U1_Device_Exit_Latency = base[3] & 0xff; + ctl->HCSPARAMS3.U2_Device_Exit_Latency = (base[3] >> 16) & 0xffff; + + ctl->HCCPARAMS1.AC64 = base[4] & 0x1; + ctl->HCCPARAMS1.BNC = (base[4] >> 1) & 0x1; + ctl->HCCPARAMS1.CSZ = (base[4] >> 2) & 0x1; + ctl->HCCPARAMS1.PPC = (base[4] >> 3) & 0x1; + ctl->HCCPARAMS1.PIND = (base[4] >> 4) & 0x1; + ctl->HCCPARAMS1.LHRC = (base[4] >> 5) & 0x1; + ctl->HCCPARAMS1.LTC = (base[4] >> 6) & 0x1; + ctl->HCCPARAMS1.NSS = (base[4] >> 7) & 0x1; + ctl->HCCPARAMS1.PAE = (base[4] >> 8) & 0x1; + ctl->HCCPARAMS1.SPC = (base[4] >> 9) & 0x1; + ctl->HCCPARAMS1.SEC = (base[4] >> 10) & 0x1; + ctl->HCCPARAMS1.CFC = (base[4] >> 11) & 0x1; + ctl->HCCPARAMS1.MaxPSASize = (base[4] >> 12) & 0xf; + ctl->HCCPARAMS1.xECP = (base[4] >> 16) & 0xffff; + + ctl->DBOFF = base[5]; + ctl->RTSOFF = base[6]; + + ctl->HCCPARAMS2.U3C = base[7] & 0x1; + ctl->HCCPARAMS2.CMC = (base[7] >> 1) & 0x1; + ctl->HCCPARAMS2.FSC = (base[7] >> 2) & 0x1; + ctl->HCCPARAMS2.CTC = (base[7] >> 3) & 0x1; + ctl->HCCPARAMS2.LEC = (base[7] >> 4) & 0x1; + ctl->HCCPARAMS2.CIC = (base[7] >> 5) & 0x1; + ctl->HCCPARAMS2.ETC = (base[7] >> 6) & 0x1; + ctl->HCCPARAMS2.ETC_TSC = (base[7] >> 7) & 0x1; + ctl->HCCPARAMS2.GSC = (base[7] >> 8) & 0x1; + ctl->HCCPARAMS2.VTC = (base[7] >> 9) & 0x1; + + output("xhci setup: version "); + outputh(ctl->HCIVERSION); + output("\n"); +}